Google’s AI Chips Break Into Meta’s Data Centers

A long-standing barrier between two major tech giants has effectively collapsed as Meta begins running production AI workloads on Google’s custom hardware. The company, known for creating the widely used PyTorch AI framework, is now utilizing Google’s Tensor Processing Units (TPUs) in its data centers. This shift marks a significant departure from the industry norm, where most major players have relied heavily on a single chip provider for their artificial intelligence infrastructure.

The technical enabler for this move is a new version of the SGLang inference engine, which has been adapted to work natively with PyTorch on Google’s chips. Previously, using these TPUs required developers to work within Google’s own JAX framework, a process that often demanded significant code rewrites. The new software stack allows Meta to deploy its existing PyTorch models onto the hardware without major structural changes. Zongwei Zhou, the PyTorch-TPU lead at Meta, confirmed that the system is already live, describing it as the result of a close collaboration between Meta, Google, and the SGLang team.

This is not the first time Meta has experimented with Google’s silicon. Earlier efforts relied on a bridge software called PyTorch/XLA, which Google now considers a predecessor to the current system. Reports indicate that Meta research teams used this older method between 2020 and 2023 before canceling those contracts. The new initiative is seen as a more robust solution, specifically designed to prevent Meta from being constrained by a single hardware architecture. Jana van Greunen, director of PyTorch engineering at Meta, emphasized that the new setup enables the deployment of workloads to Google TPUs seamlessly.

The timing of this announcement is notable, as it came just one day after Amazon revealed it was open-sourcing its own native PyTorch backend for its Trainium chips. Both moves appear to be strategic efforts to loosen the software grip that Nvidia has maintained over the AI market. By making it easier to run popular AI frameworks on alternative hardware, these companies are creating viable options for enterprises that may want to diversify their chip supply.

Performance benchmarks suggest the new setup is competitive. A tuned configuration of the vLLM engine, another inference tool now available for these chips, reportedly achieved over 700 tokens per second for a single user on Google’s seventh-generation Ironwood TPU. This figure significantly outperforms a comparable setup on Nvidia’s GB200 chips, which reached 452 tokens per second in similar tests. The speed improvements are attributed to specific optimizations for large language models, including the use of speculative decoding.

Looking ahead, the developers plan to expand support for more AI models, with DeepSeek V4.1 Flash and Reflection Beam expected to be added next. The teams aim to provide day-one support for new open-source models by the first quarter of 2027. Further details on the collaboration and the future of these tools are scheduled to be shared at the SGLang Summit in San Francisco in November.

For businesses in the Southwest and beyond, this development signals a maturing market where hardware choice is no longer dictated by software limitations. As the ecosystem becomes more interoperable, companies may find it easier to balance performance, cost, and supply chain risks in their AI strategies.